Error Correction 4

Abstract: In pursuit of large-scale fault-tolerant quantum computation, quantum low-density parity-check (LDPC) codes have been established as promising candidates for low-overhead memory when compared to conventional approaches based on surface codes. Performing fault-tolerant logical computation on QLDPC memory, however, has been a long standing challenge in theory and in practice. In this work, we propose a new primitive, which we call an extractor system, that can augment any QLDPC memory into a computational block well-suited for Pauli-based computation. In particular, any logical Pauli operator supported on the memory can be fault-tolerantly measured in one logical cycle, consisting of O(d) physical syndrome measurement cycles, without rearranging qubit connectivity. We further propose a fixed-connectivity, LDPC architecture built by connecting many extractor-augmented computational (EAC) blocks with bridge systems. When combined with any user-defined source of high fidelity \ket{T} states, our architecture can implement universal quantum circuits via parallel logical measurements, such that all single-block Clifford gates are compiled away. The size of an extractor on an n qubit code is \tilde{O}(n), where the precise overhead has immense room for practical optimizations.

Abstract: Ordered phases of matter have close connections to computation. Two prominent examples are spin glass order, with wide-ranging applications in machine learning and optimization, and topological order, closely related to quantum error correction. Here, we introduce the concept of topological quantum spin glass (TQSG) order which marries these two notions, exhibiting both the complex energy landscapes of spin glasses, and the quantum memory and long-range entanglement characteristic of topologically ordered systems. Using techniques from coding theory and a quantum generalization of Gibbs state decompositions, we show that TQSG order is the low-temperature phase of various quantum low density parity check codes on expander graphs, including hypergraph and balanced product codes. Our work introduces a topological analog of spin glasses that preserves quantum information via a physically distinct mechanism, opening new avenues for both quantum statistical mechanics and quantum computer science.

Abstract: We present the bicycle architecture, a modular quantum computing framework based on high-rate, low-overhead quantum LDPC codes identified in prior work. For two specific bivariate bicycle codes with distances 12 and 18, we construct explicit fault-tolerant logical instruction sets and estimate the logical error rate of the instructions under circuit noise. We develop a compilation strategy adapted to the constraints of the bicycle architecture, enabling large-scale universal quantum circuit execution. Integrating these components, we perform end-to-end resource estimates demonstrating that an order of magnitude larger logical circuits can be implemented with a given number of physical qubits on the bicycle architecture than on surface code architectures. We anticipate further improvements through advances in code constructions, circuit designs, and compilation techniques.

Abstract: High-rate quantum LDPC (qLDPC) codes reduce space overhead by densely packing many logical qubits into a single block of physical qubits. Here we extend such savings to computation by constructing batched fault-tolerant operations that apply the same logical gate across many code blocks in parallel. By leveraging shared physical resources to execute many logical operations in parallel, these operations realize high rates in space-time and significantly reduce computational costs. For arbitrary CSS qLDPC codes, we build batched gadgets with constant space-time overhead for (i) single-shot error correction and state preparation, (ii) code switching, and (iii) addressable Clifford gates. Using these batched gadgets we also construct parallel non-Clifford gates with low space-time cost. We outline principles for designing parallel quantum algorithms optimized for a batched architecture, and show in particular how lattice Hamiltonian dynamical simulations can be compiled efficiently. We also propose a near-term–friendly implementation using new self-dual Bivariate-Bicycle codes with high encoding rates (∼ 1/10), transversal Clifford gates, and global T gates, enabling Hamiltonian simulations with a lower space-time cost than analogous surface-code protocols and low-rate qLDPC protocols. These results open new paths toward scalable quantum computation via co-design of parallel quantum algorithms and high-rate fault-tolerant protocols.